View previous topic :: View next topic |
Author |
Message |
Walter
Joined: 14 Nov 2007 Posts: 18
|
Posted: Mon Nov 27, 2017 6:30 pm Post subject: Some errors in I2C_USI_Slave.lib ? |
|
|
After my success with the I2C-Master with your help, I downloaded the slave-lib and have new problems.
1. My master has addressed the EEPROM 24LC256. It has the address &B10100000 and so my slave get the same address. The slave should emulate this EEPROM.
But the slave could not be addressed. After many tests I noticed that it reacts on address 0. A lot of new tests shows that the slave could not handle a address when the most significant bit is set. In this case it has the address 0. So I take &B0010000 and it works.
My opinion: there must be a problem with the library.
2. To make not too much stress, I choose the Master-Speed of 100kHz. That was no good idea because the slave don't react. Only when I add a Waitus 20 after Twi_Stop_Rstart_Received: it works. With the Master-Speed of 400kHz it works without the Waitus. The Doku says I have nothing to do after the label. Wait-Statements are only mentioned in the Software-Slave. What ist the problem? It cost me a long time to find out. The other labels dont need a Wait.
3. Why have most Tiny-chips no Software-I2C-Slave-Support. It is no problem, but sometimes it seems to be the only way.
Thank God, it works. With 400kHz and an low address.
Attached are the Master- and Slave Software
(BASCOM-AVR version : 2.0.7.9 , Latest : 2.0.7.8 ) |
|
Back to top |
|
|
albertsm
Joined: 09 Apr 2004 Posts: 5913 Location: Holland
|
Posted: Tue Nov 28, 2017 9:10 pm Post subject: |
|
|
3 : the ideal way is to use TWI interface. If it does not exist, USI is also great. The software approach is also possible when hardware in the processor is missing but it depends on pins on the same port. And more important : bascom needs 32 registers and SRAM in a processor. There are a number of what i call crippled chips that are not supported.
2: it is odd. I would expect it the other way around. Do you have pull up resistors on scl/sda ? And did you test with actual hardware or proteus? for some master/slave it is required that a slave runs at a higher speed. Often the slave clock need to be 4 times as high as the master. You seem to run both at the same speed. But why 400 kHz does work and 100 KHz doesnt is not clear to me. I can not find info about it in the processor datasheet.
1: 0 is the general call address. So that should always work. The slave code waits for a start condition. When it receives the address it will compare it to the internal TWI_slaveAddress byte. That is, with out the LS but.
In the lib you find this code :
lds r24,{TWI_slaveAddress}
cp r16,r24 ; or maybe our slave address?
breq _isr_USI_OVFLW1a
_isr_USI_OVFLW1x:
if you add this code :
lds r24,{TWI_slaveAddress}
STS {SOMEBYTE},R16 ; ADD THIS ONE
cp r16,r24 ; or maybe our slave address?
breq _isr_USI_OVFLW1a
_isr_USI_OVFLW1x:
And you DIM a byte named SOMEBYTE in your code. The byte will be filled with the slave address you send after the I2CSTART from the master.
In your code you can print this info to see which value it contains.
It should be the slave address with the LS bit cleared. If the MS bit is cleared then something is wrong. _________________ Mark |
|
Back to top |
|
|
Walter
Joined: 14 Nov 2007 Posts: 18
|
Posted: Wed Nov 29, 2017 6:25 pm Post subject: |
|
|
3: No Software-I2C-Support for AVR witn USI is OK. I only tried it because the problems with USI.
2: Yes, I do have pullups of 4k7. The chips for Master is Tiny 861A and for Slave Tiny85. Not too old.
The Master-frequency-test with 4, 2 and 1MHz and the slave with 8MHz shows no difference: no reaction without Wait.
A new test with Tiny 84A as slave shows no difference.
1: The logging of the address with your Lib-change has the result:
Address &B00100000 shows 32 which is with the LSB-Bit
Address &B10100000 shows 0
This confirm my guess: the MSB-Bit 1 could not be handled.
Perhaps you have an idea
Thank you |
|
Back to top |
|
|
albertsm
Joined: 09 Apr 2004 Posts: 5913 Location: Holland
|
Posted: Wed Nov 29, 2017 8:43 pm Post subject: |
|
|
3: TWI uses less software and dedicated TWI hardware. So that is why TWI is preferred. The USI was a bonus addition to the package just like the xmega twi slave.
2: most tests were performed with tiny2313 USI. But it should not matter. I have no idea about the problem.
1: it indeed seems that the MS bit is missed. But only after a start otherwise all other data is crippled too. In our test we use &H40 so the problem did not show.
I guess we need to look into it. you best sent an email to support. Then the problem is logged and eventually taken care of. _________________ Mark |
|
Back to top |
|
|
|