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hzz
Joined: 20 Feb 2007 Posts: 314

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Posted: Sat Apr 14, 2012 6:32 pm Post subject: XMEGA SRAM and Config XRAM |
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I would like to use the XMEGA A1 chip EBI bus to connect a 512 Kbytes SRAM chip (CY7C1049) in mode SRAM ALE1 3P
The chip has an 8 bit data bus and 19 address lines A[18:A0]
Port J is used for Data
Port K is used for address A[15:8] and A[7:0] with an external latch circuit (74HC573) to multiplex these address bytes
Port H is used for WE, RE, ALE1 and address A[18:16]
My question is related to the chip select, since port H uses pins PH4:PH7 for both, address and chip select:
PH4 CS0/A16
PH5 CS1/A17
PH6 CS2/A18
PH7 CS3/A19
Question:
Since I am using a 512KBytes chip, I don't need A19 so I would like PH7 (CS3) to be the pin used for chip select; ¿how can I configure this in BASCOM?
CONFIG XRAM does not have a parameter to config the chip select pin ¿does it automatically know that it should use CS3 when setting the address size to 512K?
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MAK3
Joined: 24 Sep 2010 Posts: 449 Location: Germany

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Posted: Mon Apr 16, 2012 6:39 pm Post subject: |
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Hello hzz,
| Quote: | Question:
Since I am using a 512KBytes chip, I don't need A19 so I would like PH7 (CS3) to be the pin used for chip select; ¿how can I configure this in BASCOM?
CONFIG XRAM does not have a parameter to config the chip select pin ¿does it automatically know that it should use CS3 when setting the address size to 512K? |
You can check what is set with config xram by printing the content of the registers with print #1, bin(REGISTER) so you know what is set or not.
You can always set or change the register direct with BASCOM.
This is what ATMEL write:
| Quote: | | The XMEGA™ External Bus Interface (EBI) is a highly flexible module for interfacing external memories and memory addressable peripherals such as LCD controllers and advanced communication controllers. |
This makes it hard to take every usage into consideration in an easy to use configuration.
But if you have a working example it would be a good way for a support in future versions of Bascom-AVR.
MAK3 |
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holli
Joined: 29 Jul 2010 Posts: 28

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Posted: Mon Apr 16, 2012 8:50 pm Post subject: |
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| Here's a example for 2 blocks of SRAM, one 64K and one 512K size. If you configure CS3 only, then the CS3 Pin will not be used automatically as "chip select". You can address 512K SRAM but need to control CS3 by software if wired to the SRAM. If you configure one of CS0 - CS2 alone or together with CS3 then they are really "chip select" lines. In the example this is the case when CS2 and CS3 are configured at the same time. In this case you can address only the lower 256K out of this 512K. "Config XRAM" does not work for SRAM currently, the init waits for the "SDINITDONE" bit to be set. This is only valid for SDRAM. So set the registers directly. |
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hzz
Joined: 20 Feb 2007 Posts: 314

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Posted: Tue Apr 17, 2012 11:51 am Post subject: |
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Thanks holli!
I was hoping to be able to use BASCOM without knowing the registers. From what you say, I better read de EBI chapter of XMEGA before continuing.
In any case, I suspect that the chip select signal could be omitted (the SRAM outputs are set to HighZ state just with WE and RE signals)
Allow me a more general question: ¿why will you use SRAM instead of SDRAM?
In favor of SDRAM:
Chip is cheaper
Larger size
Simpler PCB (no need for latch circuit)
Against SDRAM
Only 4bit data bus chips can be used, this is basically only the MT48LC16 chip, and I cannot get the industrial version anywhere
I have problems in some applications with SDRAM (see http://www.mcselec.com/index2.php?option=com_forum&Itemid=59&page=viewtopic&t=10503) I don't know if I will have the same problems with SRAM
Regards
Hector |
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hgrueneis
Joined: 04 Apr 2009 Posts: 902 Location: A-4786 Brunnenthal

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Posted: Tue Apr 17, 2012 12:19 pm Post subject: |
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If you do not need very high speed, why not RAMTRON FM25v20 or FM23H20.
SPI up to 40 MHz. No wait states and they keep the data forever (outlive humans). 2Mbit 8x256K. A lot less lines too. Even if more than one are used. With ATXMEGA you can use the print command for data transfer in SPI.
Just my 2 bits.
Hubert |
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holli
Joined: 29 Jul 2010 Posts: 28

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Posted: Tue Apr 17, 2012 7:56 pm Post subject: |
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| If you just need a large memory bank on the EBI, then SDRAM is the better choice. Unfortunately with XMega A1, you can't mix SDRAM with SRAM or use the 8 bit data bus because that's only possible with 4-port EBI. I use the EBI to interface to LCD Controller, this way it's easy and fast to access the LCD memory just like other internal memory. Also I can use DMA to transfer data to the LCD. In this case if I want to use also more memory I have to go with SRAM. So you have to compromise with what you want to do and what's possible with the hardware. So if you want to address 512K (or more) with CS, then the only choice is the 2-port ALE12 setting. Here's the example code for that. |
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hzz
Joined: 20 Feb 2007 Posts: 314

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Posted: Tue Apr 17, 2012 10:16 pm Post subject: |
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| Thanks all! |
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albertsm
Joined: 09 Apr 2004 Posts: 6107 Location: Holland

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Posted: Tue Apr 24, 2012 10:58 pm Post subject: |
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holli, good work. i do not have time to test each and every configuration so some user configs that work are welcome
| Quote: | | "Config XRAM" does not work for SRAM currently, the init waits for the "SDINITDONE" bit to be set. This is only valid for SDRAM. |
it only waits for this if MODESEL3=SDRAM.
When you chose SRAM it does not wait for Ebi_cs3_ctrlb.7 to be set (unless there is a bug)
PORTJ_DIRSET = &HFF
PORTK_DIRSET = &HFF
PORTH_DIRSET = &B1111_1111 'WR, RD, CS0-3 ALE1 ALE2 output
EBI_CTRL = &B00_00_00_01 'SRAM ALE1, 3 Port
config xram=3port,
EBI_CS3_CTRLA = &B0_01011_01 'size 512 kByte, SRAM
modesel3=sram,adrsize3=512K,
EBI_CS3_CTRLB = &B00000_000 'SRAM wait state = 0
EBI_CS3_BASEADDR = &B0000_1000_0000_0000 'base &H80000
baseadr3=&H80000
thus :
config xram=3port,modesel3=sram,adrsize3=512K,baseadr3=&H80000
would do the same.
if not let me know!
it would be nice indeed to have some configurations. of course using CONFIG and possible with an image that shows the connection. _________________ Mark |
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holli
Joined: 29 Jul 2010 Posts: 28

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Posted: Wed Apr 25, 2012 3:11 pm Post subject: |
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| albertsm wrote: |
When you chose SRAM it does not wait for Ebi_cs3_ctrlb.7 to be set (unless there is a bug)
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Well, still buggy, unfortunately. At least in Version 2.0.7.3.
Here's a example for CS2 SRAM configuration. I noticed the CS base address is not set at all and is waiting for Ebi_cs3_ctrlb.7. But this is CS2 and SRAM. Also there is a "STS 0x0000,R23", don't know what for.
| Code: |
34: config xram=3port,modesel2=sram,ale=ALE12,adrsize2=512K,baseadr2=&H80000
+0000013B: E07F LDI R23,0x0F Load immediate
+0000013C: 937006E4 STS 0x06E4,R23 Store direct to data space
+0000013E: EF7F SER R23 Set Register
34: config xram=3port,modesel2=sram,ale=ALE12,adrsize2=512K,baseadr2=&H80000
+0000013F: 93700000 STS 0x0000,R23 Store direct to data space
34: config xram=3port,modesel2=sram,ale=ALE12,adrsize2=512K,baseadr2=&H80000
+00000141: EF70 LDI R23,0xF0 Load immediate
+00000142: 93700700 STS 0x0700,R23 Store direct to data space
+00000144: EF7F SER R23 Set Register
34: config xram=3port,modesel2=sram,ale=ALE12,adrsize2=512K,baseadr2=&H80000
+00000145: 93700720 STS 0x0720,R23 Store direct to data space
34: config xram=3port,modesel2=sram,ale=ALE12,adrsize2=512K,baseadr2=&H80000
+00000147: E079 LDI R23,0x09 Load immediate
+00000148: 93700440 STS 0x0440,R23 Store direct to data space
+0000014A: E27D LDI R23,0x2D Load immediate
34: config xram=3port,modesel2=sram,ale=ALE12,adrsize2=512K,baseadr2=&H80000
+0000014B: 93700458 STS 0x0458,R23 Store direct to data space
34: config xram=3port,modesel2=sram,ale=ALE12,adrsize2=512K,baseadr2=&H80000
+0000014D: 9180045D LDS R24,0x045D Load direct from data space
34: config xram=3port,modesel2=sram,ale=ALE12,adrsize2=512K,baseadr2=&H80000
+0000014F: FF87 SBRS R24,7 Skip if bit in register set
+00000150: CFFC RJMP PC-0x0003 Relative jump
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albertsm
Joined: 09 Apr 2004 Posts: 6107 Location: Holland

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Posted: Fri Apr 27, 2012 10:05 am Post subject: |
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thanks for testing. i should have done that but the code looked right. i only forgot () and so the code did work different ; if somevar and 16=16 is different then if (somevar and 16)=16. so that has been solved.
the base address is a word address with bit 12-23 so you need to divide by 4096 to get the right result. i changed that too so you can specify the address and this will be placed at the proper offset(by dividing by 4096). _________________ Mark |
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