$regfile = "atXtiny412.dat"
$crystal = 3333333
$hwstack = 16
$swstack = 16
$framesize = 24
'set the system clock and prescaler
Config Sysclock = 16_20mhz , Prescale = 6 'it is necessary to correct the error in the DAT file and add the divisor 6
Config Adc0 = Single , Resolution = 10bit , Adc = Enabled , Reference = vdd , Prescaler = 32 , Sample_len = 1 , Sample_cap = Above_1v , Init_delay = 32
'connection of zero cross detections
Config Porta.3 = Input
'permission to write to the protected area
'Bits 4, 5, 6, 7 CMPEN Compare x Enable
'This bit field enable compare as output on the pin. This bit field is reset to 0 after a Power-On Reset. At any other
'reset, the content is kept but during the reset sequence loaded from the TCD Configuration Fuse (FUSE.TCDCFG)
Cpu_ccp = &HD8
'on pin 2 portA.6 we have a timer output
Tcd0_faultctrl = &H10
'setting comparison registers
TCD0_CMPACLR = 0
TCD0_CMPbCLR = 1023
'assignment of asynchronous channel input 0 according to the table in chapter 14.5.3,
'we will read the status of portA.3 and set the asynchronous channel accordingly
' Value ASYNCCH0 ASYNCCH1 ASYNCCH2 ASYNCCH3
'0x00 OFF OFF OFF OFF
'0x01 CCL_LUT0
'0x02 CCL_LUT1
'0x03 AC0_OUT
'0x04 TCD0_CMPBCLR
'0x05 TCD0_CMPASET
'0x06 TCD0_CMPBSET
'0x07 TCD0_PROGEV
'0x08 RTC_OVF
'0x09 RTC_CMP
'0x0A PORTA_PIN0 PORTB_PIN0 PORTC_PIN0 PIT_DIV8192
'0x0B PORTA_PIN1 PORTB_PIN1 PORTC_PIN1 PIT_DIV4096
'0x0C PORTA_PIN2 PORTB_PIN2 PORTC_PIN2 PIT_DIV2048
'0x0D PORTA_PIN3 PORTB_PIN3 PORTC_PIN3 PIT_DIV1024
'0x0E PORTA_PIN4 PORTB_PIN4 - PIT_DIV512
'0x0F PORTA_PIN5 PORTB_PIN5 - PIT_DIV256
'0x10 PORTA_PIN6 - - PIT_DIV128
'0x11 PORTA_PIN7 - - PIT_DIV64
'0x12 UPDI - - -
'Other -
Evsys_asyncch0 = &H0D
'connection of event system of asynchronous channel 0 to timer TCD0
'ASYNCUSERn User Multiplexer Description
'0 TCB0 Timer/Counter B 0
'1 ADC0 ADC 0
'2 CCL_LUT0EV0 CCL LUT0 Event 0
'3 CCL_LUT1EV0 CCL LUT1 Event 0
'4 CCL_LUT0EV1 CCL LUT0 Event 1
'5 CCL_LUT1EV1 CCL LUT1 Event 1
'6 TCD0_EV0 Timer Counter D 0 Event 0
'7 TCD0_EV1 Timer Counter D 0 Event 1
'8 EVOUT0 Event OUT 0
'9 EVOUT1 Event OUT 1
'10 EVOUT2 Event OUT 2
'Value Name
'0x0 OFF
'0x1 SYNCCH0
'0x2 SYNCCH1
'0x3 ASYNCCH0
'0x4 ASYNCCH1
'0x5 ASYNCCH2
'0x6 ASYNCCH3
'Other -
'
Evsys_asyncuser6 = &H03
'TCD0 timer input event 0 setting
'Bits 7:6 CFG[1:0] Event Configuration
'When the input capture noise canceler is activated (FILTERON), the event input is filtered. The filter function requires
'four successive equal valued samples of the trigger pin to change its output. The input capture is, therefore, delayed
'by four clock cycles when the noise canceler is enabled (FILTERON).
'When the Asynchronous Event is enabled (ASYNCON), the event input will affect the output directly.
'Value Name Description
'0x0 NEITHER Neither filter nor asynchronous event is enabled.
'0x1 FILTERON Input capture noise cancellation filter enabled.
'0x2 ASYNCON Asynchronous event output qualification enabled.
'other - Reserved.
'Bit 4 EDGE Edge Selection
'This bit is used to select the active edge or level for the event input.
'Value Name Description
'0 FALL_LOW The falling edge or low level of the event input triggers a Capture or Fault action.
'1 RISE_HIGH The rising edge or high level of the event input triggers a Capture or Fault action.
'Bit 2 ACTION Event Action
'This bit enables capturing on the event input. By default, the input will trigger a Fault, depending on the Input Control
'registers Input mode. It is also possible to trigger a capture on the event input.
'Value Name Description
'0 FAULT Event triggers a Fault.
'1 CAPTURE Event triggers a Fault and capture.
'Bit 0 TRIGEI Trigger Event Input Enable
'Writing this bit to 1 enables event as the trigger for input A.
Tcd0_evctrla = &B01010101
'setting the timer response to the incoming signal from the event system
'Bits 3:0 INPUTMODE[3:0] Input Mode
'Value Name Description
'0x0 NONE The input has no action.
'0x1 JMPWAIT Stop the output, jump to the opposite compare cycle, and wait.
'0x2 EXECWAIT Stop the output, execute the opposite compare cycle, and wait.
'0x3 EXECFAULT Stop the output, execute the opposite compare cycle while the Fault is active.
'0x4 FREQ Stop all outputs, maintain the frequency.
'0x5 EXECDT Stop all outputs, execute dead time while the Fault is active.
'0x6 WAIT Stop all outputs, jump to the next compare cycle, and wait.
'0x7 WAITSW Stop all outputs, wait for software action.
'0x8 EDGETRIG Stop the output on the edge, jump to the next compare cycle.
'0x9 EDGETRIGFREQ Stop the output on the edge, maintain the frequency.
'0xA LVLTRIGFREQ Stop the output at level, maintain the frequency
Tcd0_inputctrla = &H06
'pre-divider settings and counter start
Tcd0_ctrla = &B01110001
'we thus obtained a self-resetting timer which generates an asynchronous signal at the output
'according to the input signal on my pin A.3
' the advantage is that it does not burden us run the program
'So how to use it? The more receptive found out right at the beginning. We connect the zerocross
'detection, we connect the optotriack to the output pin of the timer by connecting it to the output
' of the processor with a cathode. We connect a potentiometer to the input pin (for me 1) of the AD converter
'and we have a simple power regulator.
'With the appropriate timer frequency and end value, you can write the AD conversion value directly to
'the timer register. 1023 control values per pulse seems to me to be sufficient.
'Just pay attention to the end values in the case of using a simple zerocross detector with an
'optocoupler (it does not send a signal exactly at zero crossing,
'but just before and just after that in the extreme positions the power is not 100% and at zero the phase shift occurs,
'the lower the input voltage is the greater this error).
Dim A As Word
Waitms 5
Do
A = Getadc(1)
'write the AD conversion value to the comparison register
TCD0_CMPACLR = a
'confirmation of the new value
Tcd0_ctrle = &B00000001
Waitms 100
Loop
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