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ATXMEGA: Output a triangle wave from XRAM over DMA to DAC B
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MAK3

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Joined: 24 Sep 2010
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PostPosted: Sun Mar 04, 2012 7:02 pm    Post subject: ATXMEGA: Output a triangle wave from XRAM over DMA to DAC B Reply with quote

Hi,

for all ATXMEGA user here an example that:

1. Generate a triangle wave in XRAM (in external 8MByte SDRAM over External Bus Interface)
2. Ouput this triangle wave over DMA to DAC B Channel 0

Notice: The Do....Loop is empty (and there are no interrupts !) so after configuration everything is running in just HARDWARE !

This really show what an ATXMEGA is capable to achieve.

Measured by oscilloscope:


Code:
'Output a triangle wave which is saved in XRAM and output over DMA to DAC B Channal 0


$regfile = "xm128a1def.dat"
$crystal = 32000000                                         '32MHz
$hwstack = 64
$swstack = 40
$framesize = 40

Config Osc = Disabled , 32mhzosc = Enabled                  '32MHz
'configure the systemclock
Config Sysclock = 32mhz , Prescalea = 1 , Prescalebc = 1_1
Config Priority = Static , Vector = Application , Lo = Enabled

Config Com5 = 57600 , Mode = Asynchroneous , Parity = None , Stopbits = 1 , Databits = 8       'Portf.2 and Portf.3 is COM7
Open "COM5:" For Binary As #1

Print #1 ,
Print #1 , "Start output of triangle wave from XRAM over DMA to DAC B Channel 0"


Dim Memory_address As Word


' Demoboards like XPLAIN has a 64 MBit SDRAM (MT48LC16M4A2TG) which is 8 MByte, it is connected in 3 port, 4 bit databus mode
' http://www.micron.com/products/ProductDetails.html?product=products/dram/sdram/MT48LC16M4A2TG-75
' in the PDF of the SDRAM you can see it is connected as 16 Meg x 4. Refreshcount is 4K and the row address is A0-A11, column addressing is A0-A9
' SDRAM = SYNCHRONOUS DRAM
Config Xram = 3port , Sdbus = 4 , Sdcol = 10 , Sdcas = 3 , Sdrow = 12 , Refresh = 500 , Initdelay = 3200 , Modedelay = 2 , Rowcycledelay = 7 , Rowprechargedelay = 7 , Wrdelay = 1 , Esrdelay = 7 , Rowcoldelay = 7 , Modesel3 = Sdram , Adrsize3 = 8m , Baseadr3 = &H0000
' the config above will set the port registers correct. it will also wait for Ebi_cs3_ctrlb.7
' for all other modes you need to do this yourself !

$xramsize = 8000000                                         ' 8 MByte

' XRAM Start direct after the SRAM range of a XMEGA which is after 16KByte so the first XRAM address is 16384
' The maximum XRAM is in case of 8MByte SDRAM  = 8000000 - 16384 = 7983616 Byte
Dim X(1000000) As Xram Word                                 '7,98 MByte (big mem must be XRAM)
' Restriction : variables placed outside 64KB memory may not be passed to SUB functions because addressing outside of 64KByte will not fit in a word !


Dim I As Word
Dim Y As Word


For I = 1 To 4096                                           'From 0V .....3.3Volt (with Reference = avcc)
  X(i) = I
Next

Y = 4096
For I = 4097 To 8192
  Decr Y
  X(i) = Y
Next

Memory_address = Varptr(x(1))                               'We want to know now what is the Address of X(49152)
Print #1 , "XRAM Adress =  " ; Memory_address

I = X(4096)
Print #1 , "I=" ; I


Config Tcc0 = Normal , Prescale = 1
Tcc0_per = 128                                              '31 --> 32MHz/32 = 1MHz

Config Event_system = Dummy , Mux0 = Tcc0_ovf               'TCC 0 overflow --> Event Channel 0

Config Dacb = Enabled , Io0 = Enabled , Channel = Single , Trigger_ch0 = Enabled , Event_channel = 0 , Reference = Avcc , Interval = 64 , Refresh = 64
'DAC B Channel 0 is triggered by Event Channel 0

' DMA Interrupt
Config Dma = Enabled , Doublebuf = Disabled , Cpm = Rr      ' enable DMA, Double Buffer disabled

' DMA Channel 0 is used here
Config Dmach0 = Enabled , Burstlen = 2 , Chanrpt = Enabled , Tci = Off , Eil = Off , Singleshot = Enabled , _
 Sar = Transaction , Sam = Inc , Dar = Burst , Dam = Inc , Trigger = &H25 , Btc = 16384 , Repeat = 0 , Sadr = Varptr(x(1)) , Dadr = Varptr(dacb_ch0datal)

' Trigger = &H25 (DAC B Base Level Trigger) + Channel 0 = &H00 --> &H25
' Burstlen is 2 byte because the DAC output value is a 12-Bit value you need to transfer 2 byte
' Source address (the array) is incremented until all bytes transfered (16384 byte)
' Destination address (DAC B Channel 0) is incremented once to transfer the low byte and high byte of the 12-bit value
' BTC = 16384 BYTE (needed to transfer the 8192 word)
' Reapeat = 0 --> repeat forever



Do

Loop

End                                                         'end program

 


MAK3
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Paulvk

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PostPosted: Tue Mar 06, 2012 10:57 am    Post subject: Reply with quote

I can see the xmega being a great web server.

Maybe you should change to X-MAK3 you are becoming the X-mega guru Razz

Thankyou when I get to my xplained board all this is going to be so helpfull.

Regards Paul
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AndersL

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PostPosted: Tue Mar 06, 2012 12:29 pm    Post subject: Reply with quote

He-he... Becoming? MAK3 is the XMega guru Smile

@MAK3 very nice hw coding. It wil cost me 65$ for a new xplain board Smile

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Tubeampman

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Joined: 27 Feb 2006
Posts: 97
Location: Bodo

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PostPosted: Tue Mar 06, 2012 9:59 pm    Post subject: Reply with quote

Hi AndersL
Can you please tell me where i can buy the Xplain-board.
I found several that has a comercial for it, but not in stock.

Best regards
Oyvind
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Paulvk

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PostPosted: Tue Mar 06, 2012 11:08 pm    Post subject: Reply with quote

I got my one directly from Atmel here store.atmel.com/PartDetail.aspx?q=p:10500183

Regards Paul
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Tubeampman

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PostPosted: Tue Mar 06, 2012 11:15 pm    Post subject: Reply with quote

hi
Thanks alot for the link.
It was cheap to Smile

Oyvind
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Paulvk

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PostPosted: Tue Mar 06, 2012 11:23 pm    Post subject: Reply with quote

It was cheap to! Yes but you have to pay freight which could be $20 to $50 US I got a programmer as well which made ok and still cheaper than local.

Regards Paul
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MAK3

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PostPosted: Wed Mar 07, 2012 12:02 am    Post subject: Reply with quote

Quote:
I can see the xmega being a great web server.

Hi Paulvk, AndersL, Tubeampman,

brush up your XMEGA skills.
SIX1 will release his universal software interface soon which is all about a webserver also with ATXMEGA.
http://www.mcselec.com/index2.php?option=com_forum&Itemid=59&page=viewtopic&p=52577#52577

The used board can be found in internet with "alvidi atxmega128a1"
and in addition with WIZ820io from Wiznet.

MAK3
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Per Svensson

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PostPosted: Thu Apr 05, 2012 1:18 pm    Post subject: Reply with quote

Hmmm...
Talking about signal generation

Realizing that a triangle wave can be generated by integrating (successive addition) a square wave,
and generation of a sine-wave is yet another integration of the triangle wave...
Especially now when we have the Xmega with PWM, DMA, EVENTSTEM, DAC and other neat features. Wouldn't it be possible to
generate as pure sine-wave more or less without CPU effort by double integration of the PWM. (or some other square-wave source)

Any clever thoughts here?

Over a cup of coffee and thee gingerbreads...
/Per
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MAK3

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PostPosted: Thu Apr 05, 2012 5:37 pm    Post subject: Reply with quote

Hello,

Quote:
Wouldn't it be possible to
generate as pure sine-wave

Sure. The DAC Output don't care what you store in XRAM. So when you generate by software a sine wave and you store it in XRAM you can send it direct over DMA to DAC. You can also measure a sine wave with ADC, store it in XRAM and send it out over DAC when you need it (also over DMA). And it's up to you if you describe a sine wave with 100 points or with 1000 points (only a matter of SRAM or XRAM availability).
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Per Svensson

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PostPosted: Fri Apr 06, 2012 4:59 pm    Post subject: Reply with quote

Yes, we can always let the DMA output a block of sine-weighted bytes to the DAC,
but that will not allow us to control the frequency as the DMA will simply dump data into the dac as fast it can.
I imagine a timer + the event system will do a better job at outputting data to the dac at a predictable pace.
After all we want to set up a frequency and then let everything run automatic. period after period, seamlessly,
and with low thd.

My original idea was to use a doule integration (a triangle wave controlling another triangle wave) That way we need not build
a ram table at all, and frequency is easier to contol. But I can see limitations too...

A DDS approach could also be used ( http://en.wikipedia.org/wiki/Direct_digital_synthesizer )
How do we use Xmega hardware features optimal for this?
A MAC unit would have been nifty

/P
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MAK3

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PostPosted: Fri Apr 06, 2012 6:33 pm    Post subject: Reply with quote

Hello,

Quote:
but that will not allow us to control the frequency as the DMA will simply dump data into the dac as fast it can.
I imagine a timer + the event system will do a better job at outputting data to the dac at a predictable pace.


Have a closer look at my example.

DAC is already triggerd by a counter over event system.
DMA is triggerd by DAC.


MAK3
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Matrixx

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PostPosted: Thu Feb 19, 2015 4:52 am    Post subject: Reply with quote

Is there a way to change DACB to DACA?

DACB on the XPLain goes to the audio amp and is kind difficult to use as triangle wave output (very tinny tracks).
But DACA is routed to header J2.

I have tried but still cannot get the DACA to make the triangle wave... I'm still in rock era with DMA's and Xmegas.
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rsavas

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PostPosted: Fri Feb 20, 2015 7:52 am    Post subject: Reply with quote

Config Daca = Enabled , Io0 = Enabled , Channel = Single , Trigger_ch0 = Enabled , Event_channel = 0 , Reference = Avcc , Interval = 64 , Refresh = 64
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Matrixx

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PostPosted: Fri Feb 20, 2015 8:37 pm    Post subject: Reply with quote

I did that way but no signal on DACA output. I also tested changing the reference at the DMA line:

Code:

' DMA Channel 0 is used here
Config Dmach0 = Enabled , Burstlen = 2 , Chanrpt = Enabled , Tci = Off , Eil = Off , Singleshot = Enabled , _
 Sar = Transaction , Sam = Inc , Dar = Burst , Dam = Inc , Trigger = &H25 , Btc = 16384 , Repeat = 0 , Sadr = Varptr(x(1)) , Dadr = Varptr(dacb_ch0datal)
 


Replacing Varptr(dacb_ch0datal) with Varptr(daca_ch0datal)

But still nothing.
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