Posted: Sun Apr 23, 2017 5:22 pm Post subject: timer interrupt no possible during interupt URXC
hello
i have no interript with the timer during the reception in the serial port URXC.!
and my count of time is false!!!
where is the solution?
thanks
ragards
when an interrupt is serviced, the processor disables the global interrupt flag in SREG. This is done by hardware.
This global flag is the same you alter when using ENABLE/DISABLE INTERRUPTS
So one solution would be to use ENABLE INTERRUPTS so other interrupts can occur again.
This is however potential unsafe since it could use a lot of stack space. _________________ Mark
edit: You still need more stack space as you can have 2 isr running at the same time. But you avoid the possible problem that the same isr is called 2,3,4 .. n times which leads into a stack overflow.
BTW, for XMega the global interrupt is not disabled by default - these chips have an interrupt controller with priorities. The TOs problem would be solved by giving the timer interrupt a higher priority than the serial interrupt.
Joined: 16 Jan 2006 Posts: 2483 Location: Queensland
Posted: Thu Apr 27, 2017 3:11 am Post subject:
You should not miss an IRQ in that situation. The timer IRQ flag is still set even if you are servicing another interrupt. Unless you clear that IRQ flag explicitly during the other ISR ( which you should never do ), all that will happen is that the timer IRQ will be serviced immediately after the serial ISR completes. The actual time at which the clock is updated will be delayed a bit.
Obviously the serial ISR should still be as reasonably short as possible, but that applies to any ISR, you should never do big complicated stuff in an ISR. _________________ Adrian Jansen
Computer language is a framework for creativity
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